VLSI Implementation of Efficient Three-Step Search Algorithm for Motion Estimation

An efficient data flow pattern and corresponding hardware architecture for efficient three-step search(E3SS) algorithm are preseated for motion estimation.The data flow exploits the overlap of reference data among the search points to reduce data memory accesses that are the most power consuming operations in motion estimation.The corresponding hardware architecture implements the search for two different patterns of E3SS efficiently.Simulation results show that the average number of cycles required to make a block matching for different test sequences is 280,which fulfills the speed requirement of MPEG-4 and HDTV standards.