An Algorithm for Hierarchical Simulation of Digital Circuits

On the basis of the topology of digital circuits,a hierarchical algorithm for circuit simulation is proposed.The main idea is dividing the simulation process into two phases.In the first phase,a logic circuit is structurized and each macroblock is set to the state of either activation or suspension according to the input values of this circuit at the current time.In the second phase,all nodes in each activated macroblock are firstly ordered with breadth-first search pattern.Then all nodes in the macroblock are simulated in reverse order until the output value of the macroblock is obtained.