An FPGA-Based P-H Method On-Board Solution for Satellite Relative Attitude
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Graphical Abstract
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Abstract
Aimed at the situation that the low-level algorithms were implemented in satellite real time processing system for remote sensing image, this paper proposes an FPGA (field programmable gate array) -based P-H method for satellite relative attitude on-board solution. The proposed algorithm not only avoids computations of trigonometric function and estimation of initial value, but also reduces the number of iterations when comparing with the Eulerian angle-based algorithm. The Xilinx FPGA (V7 xc7vx1140tflg1930-1) is selected as the hardware platform for the real-time processing. In FPGA implementation:①We adopt a 64-bit floating point data structure and a strategy of combination of serial and parallel processing; ②a lower-upper (LU) decomposition-block algorithm is adopted for matrix inversion. The experimental results indicate that the number of iterations of the proposed algorithm is 13 less than the Eulerian angle-based algorithm. The difference of FPGA and PC implementation is about 5.0×10-14 and the speedup is about 10, which meets the requirements of precision and speed for on-board image real time processing. The proposed algorithm can be suitable for high real-time image processing field.
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