何国良, 李元香, 涂航, 戴志锋. 一种多层次数字电路仿真算法[J]. 武汉大学学报 ( 信息科学版), 2006, 31(12): 1120-1123.
引用本文: 何国良, 李元香, 涂航, 戴志锋. 一种多层次数字电路仿真算法[J]. 武汉大学学报 ( 信息科学版), 2006, 31(12): 1120-1123.
HE Guoliang, LI Yuanxiang, TU Hang, DAI Zhifeng. An Algorithm for Hierarchical Simulation of Digital Circuits[J]. Geomatics and Information Science of Wuhan University, 2006, 31(12): 1120-1123.
Citation: HE Guoliang, LI Yuanxiang, TU Hang, DAI Zhifeng. An Algorithm for Hierarchical Simulation of Digital Circuits[J]. Geomatics and Information Science of Wuhan University, 2006, 31(12): 1120-1123.

一种多层次数字电路仿真算法

An Algorithm for Hierarchical Simulation of Digital Circuits

  • 摘要: 根据数字电路的拓扑结构,提出了一种多阶段的仿真算法。实验表明,本算法能较好地满足演化硬件系统平台对个体电路进行适应度评估的要求。

     

    Abstract: On the basis of the topology of digital circuits,a hierarchical algorithm for circuit simulation is proposed.The main idea is dividing the simulation process into two phases.In the first phase,a logic circuit is structurized and each macroblock is set to the state of either activation or suspension according to the input values of this circuit at the current time.In the second phase,all nodes in each activated macroblock are firstly ordered with breadth-first search pattern.Then all nodes in the macroblock are simulated in reverse order until the output value of the macroblock is obtained.

     

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